| Product | Pricing | Status | Architecture | CPU Type | MaxSpeed (MHz) | CPU Speed (MIPS/DMIPS) | Program Memory Size (KB) | RAM (bytes) | Core | ADCSmpRateksps2 | Pin Count | Number of ADCs | Max ADC Sampling Rate (ksps) | Temp Range Max | Temp Range Min | Operation Volatge Range | CTMU | UART | SPI | I2C | I2S | USB Interface | Number of USB Modules | Number of CAN Modules | LIN | IrDA | Max # PWM outputs (including complementary outputs) | Quadrature Encoder Interface (QEI) | Max 16 Bit Digital Timers | Max 32 Bit Digital Timers | Watch Dog Timers (WDT) | Packages | Multiple Flash Panels | Power On Reset (POR) | Max I/O Pins | Direct Memory Access (DMA) Channels | Peripheral Pin Select (PPS)/Pin Muxing | Number of PWM Time Bases | Input Capture | Standalone Output Compare/ Standard PWM | PWM Max Resolution (bits) | PWM Resolution (time ns) | ADC Channels | Max ADC Resolution (bits) | Motor Control PWM Channels | Low Power | External Memory Bus Interface | QSPI | Crypto Engine | Hardware Touch Peripheral | Vbat/Vddbu for battery backup | SecureBootWithFlashOTP_New | Secure Bootloader (CodeGuard Security) | Number of Comparators | Number of Op Amps | Single output CCP (SCCP) | Multiple output CCP (MCCP) | BootMemory | Brown Out Reset (BOR) | Number of DACs | DAC outputs | Max DAC Resolution (bits) | Peripheral Trigger Generator (PTG) | SENT | Number of Cores | Class B Safety Library | Max 8 Bit Digital Timers | Auxiliary Flash (KB) | Configurable Logic Cell Modules (CLC /CCL) | 秋 |
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